When a data processor is reset, the data processor is configured in a preselected reset configuration which depends on an application being performed by the data processor. Some data processors are configured for reset using a system integration module. Other data processors which have multiple modes of operation require multiple external integrated circuit pins to determine a reset configuration for a particular application. When a data processor is configured for reset in accordance with logic values driven to external integrated circuit pins, external circuitry is required to drive the logic values onto the integrated circuit pins. Furthermore, the logic values, or configuration data, must be removed from the integrated circuit pins after a reset operation is executed to allow for a normal mode of operation.
Additionally, a configuration for operation of the device after execution of the reset operation should be established during the reset operation since a data processing operation immediately following the reset operation may provide different results in different data processor configurations. For example, a data processing instruction may be required to "tell" the data processor whether the first instruction after reset should be fetched from internal storage within the data processor or from a device external to the data processor. In another example, the instruction may be required to "tell" the data processor whether a mode of operation is a multiplexed mode, where address signals, data signals, and optional control signals are provided on the same bus terminals at different times, or a non-multiplexed mode, where address signals, data signals, and control signals are provided on different bus terminals. When no configuration is specified during a reset operation, the data processor is typically placed in a default configuration.
An external user who desires to override the default configuration of a data processor generally uses an external circuit to drive appropriate reset configuration data onto the external integrated circuit pins of the data processor to configure the data processor in a desired manner. However, providing the external circuit significantly increases overhead costs associated with the data processor and may be prohibitive in some data processing environments. A new solution is required to provide for external reset configuration of a data processor in a cost effective manner. This statement is especially true for those users who require a high volume of data processors because they may be significantly more competitive if they are able to eliminate the external circuit now required to drive reset configuration data onto external integrated circuit pins during a reset operation.
Such users have generally met their volume needs by requiring a manufacturer of the data processor to develop and manufacture a data processor that is tailored to their specifications. This tailored solution also requires the manufacturer to provide a circuit for selectively configuring the data processor to another configuration, even the default configuration, for any number of purposes which may be required for low volume users who cannot afford to require the manufacturer to tailor a data processor tailored to their specifications. As a compromise, the manufacturer may implement a register in an electrically erasable programmable read only memory, (EEPROM) which may be programmed to configure the data processor to operate in a certain mode of operation. However, this EEPROM register is generally hard to test, requires a long time to program, and is more expensive to implement. Furthermore, programming the EEPROM register is another manufacturing step which may significantly increase the overhead costs associated with high volume users.
Therefore, there is a need for a data processor which may be easily configured during reset and which minimizes overhead costs of the data processor.